1. Field of the Invention
The present invention relates to a semiconductor device in which a semiconductor element is disposed on an insulating substrate.
2. Description of the Related Art
Conventionally, a semiconductor device is known in which a semiconductor element is disposed on an insulating substrate. The insulating substrate has a planar insulating member made of ceramics or the like and a wiring pattern formed on an upper surface of the insulating member and made of copper or the like. A back electrode of the semiconductor element is joined onto the wiring pattern by soldering.
For example, by connecting an external electrode disposed independently of the insulating substrate with the wiring pattern of the insulating substrate through wire bonding in such a semiconductor device, the back electrode of the semiconductor element can be taken out to the outside of the device through the external electrode.
However, when the wiring pattern of the insulating substrate and the external electrode are connected through wire bonding as described above, in order to prevent a bonding tool from interfering with parts inside the semiconductor device, it is necessary to provide a clearance in the vicinity of bonding portions, which makes the semiconductor device larger.
Further, because wire used for the wire bonding has a small cross-sectional area through which current passes, the electrical resistance is large. And, the inductance of the wire is also large. Thus, there is a problem that the electrical energy loss is large.
Herein, it can be considered that, by directly joining the external electrode onto the wiring pattern of the insulating substrate through ultrasonic joining, the back electrode of the semiconductor element is taken out to the outside of the device through the external electrode.
However, because an insulating member located under the wiring pattern in the insulating substrate is made of ceramics or the like and is brittle compared with copper or the like forming the wiring pattern, when the external electrode is ultrasonically joined onto the wiring pattern of the insulating substrate, there is a fear that the insulating member of the insulating substrate is damaged such as being cracked or broken due to stress of ultrasonic vibration or due to a load during the joining.
For example, in a semiconductor device disclosed in JP 11-145188 A, a metal bump for absorbing the load during the joining and the ultrasonic vibration is formed on an electrode pad provided on an upper surface of a semiconductor chip. By joining a lead frame onto the metal bump, ultrasonic joining can be performed while the semiconductor chip is prevented from being damaged.
However, when the joining method disclosed in JP 11-145188 A is applied to joining of an external electrode onto a wiring pattern of an insulating substrate, it is necessary to provide a metal bump on the wiring pattern of the insulating substrate, which makes the structure complicated. Further, because the number of process steps as a whole is increased in order to form the metal bump, additional effort has to be taken in the manufacture. Those situations are problematic.